Upon successful completion of the course the students will be able to
CO1: Explore the hierarchical modelling concepts for Digital System Design.
CO2: Write a verilog code for digital circuits and perform simulation using CAD tool.
CO3: Apply the System Verilog language rules for new hierarchy and connectivity features, and interfaces.
CO4: Apply the System Verilog verification features, including classes, strings, queues and dynamic arrays.
CO5: Develop system verilog code for digital systems using CAD tool.
- Teacher: KARTHIKA S